TQMC600: Artix 7 FPGA QMC Module with Configurable Digital I/O

Reconfigurable FPGA computing in VITA 93.0 QMC form factor

The TQMC600 expands the TEWS Technologies embedded I/O portfolio with a QMC mezzanine combining a user-programmable AMD Artix 7 XC7A50T-2 FPGA with several digital I/O configurations.

The single-width module conforms to VITA 93.0 and connects to the host through a PCI Express Revision 2.1 interface, with the PCIe endpoint implemented in the FPGA.

This design provides a standard QMC building block for applications requiring digital I/O functionality to be adapted at FPGA level.

Three digital I/O configurations

The TQMC600 is available with three electrical I/O options.

• The TQMC600-10R provides 32 ESD-protected, 5 V-tolerant TTL lines. Each line can be independently configured as input or output. TTL outputs can operate in high, low or tristate mode.
• The TQMC600-11R provides 16 ESD-protected differential EIA-422/EIA-485-compatible I/O lines with onboard 120 Ω termination.
• The TQMC600-12R provides 16 ESD-protected differential M-LVDS I/O lines with onboard 100 Ω termination.

This allows the electrical interface to be selected according to system requirements while retaining the same QMC form factor and FPGA platform.

Individually configurable input and output lines

Every I/O line can be individually programmed as an input or output.

The user FPGA is configured from a 128 Mbit SPI Flash, which supports FPGA configuration and user data.

This capability provides a reconfigurable digital I/O resource for industrial applications and selected Defense, Aerospace & Security applications requiring programmable FPGA functionality in a compact modular format. TQMC600 is also positioned within the QMC ecosystem for adaptive edge computing in aerospace and defence.

FPGA development and debugging with AMD Vivado™

User FPGA logic can be developed with AMD Vivado™.

The QMC JTAG interface provides FPGA readback and in-circuit debugging using Vivado Integrated Logic Analyzer (ILA).

A Board Reference Design is also available, implementing the PCIe interface, register mapping and basic I/O functions. It is supplied as a Vivado project with source code and a ready-to-load bitstream.

Software support

The TQMC600 uses the TDRV020-SW software family for reconfigurable FPGA boards.

Support is available for:

• Green Hills INTEGRITY;
• VxWorks;
• Windows;
• Linux;
• QNX Neutrino.

Air- and conduction-cooled versions

All three I/O configurations are available in air-cooled and conduction-cooled variants:

• TQMC600-10R-A / -10R-H: 32 TTL I/Os;
• TQMC600-11R-A / -11R-H: 16 EIA-422/EIA-485 I/Os;
• TQMC600-12R-A / -12R-H: 16 M-LVDS I/Os.

The module operates from -40°C to +85°C and measures 78.25 × 26 mm.

Integrating the TQMC600 into a complete QMC platform

The TQMC600 requires a carrier or host platform with a compatible QMC site.

It can be combined with the TPCE210 PCI Express Gen2 dual-QMC carrier or the TCPS210 3U CompactPCI Serial carrier with three QMC sites. TEWS also offers the TVNX210 for integrating two QMC modules into a VNX+ platform.

For wider system requirements, the TQMC600 can be integrated through ECRIN Systems' COTS and Modified COTS approach.

Project management, production and system integration and obsolescence management can also be included according to program scope.

Product versions