AMC535: AMC FPGA Carrier with FMC and Arria 10 SoC SX660

The AMC535 expands the VadaTech embedded-computing portfolio with an AdvancedMC platform combining FPGA processing, an integrated Arm processor, DDR4 memory and FMC expansion.

The module is based on an Arria 10 SoC SX660 in an F1517 package, combining programmable FPGA resources with an integrated dual-core Arm Cortex-A9 processor running at 1.2 GHz.

The combination enables software-based control and processing to operate alongside highly parallel FPGA functions on the same AMC module.

The AMC535 family targets radar, SIGINT, broadcast and backhaul applications, making it particularly relevant to Defense, Aerospace & Security systems and Information & Communication Systems.

Arria 10 SoC SX660 with dual-core Arm Cortex-A9

The integrated processing subsystem provides two Arm Cortex-A9 cores running at 1.2 GHz.

The processor has its own dedicated 2 GB DDR4 memory bank together with 4 GB of eMMC Flash.

This allows management, software and control tasks to run locally while the FPGA handles parallel data processing and high-speed I/O.

16 GB DDR4 directly connected to the FPGA

The FPGA has access to 16 GB of DDR4, implemented as two 64-bit memory banks.

This large local memory resource supports buffering, processing and data queuing close to the FPGA.

It is particularly valuable for high-rate acquisition and signal-processing applications where data movement between external memory and the FPGA can become a limiting factor.

VITA 57 FMC expansion

The AMC535 includes a single FMC site.

All LA, HA and HB pairs and 10 DP SERDES lanes are routed to the FMC connector.

This provides a flexible path for adding high-speed data-conversion, RF, networking or other FMC I/O functions to the FPGA platform, subject to the electrical and system requirements of the selected mezzanine.

FPGA-programmable AMC fabrics

AMC Ports 4 through 11 are directly routed to the FPGA.

Supported protocols can be implemented in programmable logic, including:

• PCI Express;
• Serial RapidIO;
• Aurora;
• 10GbE / 40GbE.

Ports 12–15 and 17–20 can also be routed to the FPGA depending on the selected ordering option.

This allows the AMC535 to be adapted to the actual MicroTCA backplane fabric rather than being restricted to a single fixed high-speed protocol.

Dual PCIe x4 or single x8

PCI Express routing can be selected for:

• Ports 4–7;
• Ports 8–11;
• Ports 4–11.

This supports configurations including dual x4 or single x8 PCIe through the FPGA.

The interface can therefore provide high-bandwidth connectivity to processors or additional processing modules within the MicroTCA platform.

SRIO, Aurora and 1/10/40GbE

The FPGA also supports dual x4 SRIO/Aurora connectivity.

Ethernet capabilities include 1GbE, 10GbE and 40GbE through the FPGA, depending on the selected port routing and FPGA implementation.

This flexibility enables the AMC535 to act as a programmable processing node directly connected to the system fabric.

Flexible clock distribution

FCLKA, TCLKA, TCLKB, TCLKC and TCLKD are routed to the FPGA.

A M-LVDS Cross Bar Switch provides flexible clock routing, while an onboard clock jitter cleaner supports low-jitter clock distribution.

A Stratum-3 TCXO option is available in place of the standard XO.

These timing resources are especially useful for synchronized acquisition, communications and signal-processing systems.

IPMI 2.0 and MicroTCA integration

The AMC535 provides IPMI v2.0 module management and supports AMC.0, AMC.1, AMC.2, AMC.3 and AMC.4 functions according to configuration.

A hot-swap ejector handle, IPMI management indicators and four user-defined LEDs support platform management and diagnostics.

Front-panel diagnostic interfaces

Two micro-USB RS-232 interfaces are provided:

• management RS-232;
• FPGA RS-232.

These interfaces provide direct access during configuration, development and diagnostic operations.

FPGA reference design and Linux support

Software resources include:

• default FPGA image stored in Flash;
• Linux BSP;
• build scripts;
• device driver;
• reference application projects.

A VHDL reference design supports validation of Base and Fabric channels, clocks, data transfers, memory and user-defined LEDs.

This provides a starting point for custom FPGA application development.

Commercial, industrial and extended configurations

Available environmental options include:

* Extended configurations use conduction cooling, with temperature specified at the edge of the module and availability depending on configuration.

Optional Humiseal 1A33 polyurethane and Humiseal 1B31 acrylic conformal coatings are available.

Storage temperature is -40°C to +85°C, with 5–95% non-condensing humidity, 1 G vibration from 5 to 500 Hz on each axis and 30 G shock on each axis.

Approximately 30 W application-dependent power

Published power consumption is approximately 30 W, with the actual figure depending on the application and FPGA configuration.

Complete thermal design therefore needs to account for the FPGA image, installed FMC mezzanine and other modules within the chassis.

Building a complete FMC + FPGA + MicroTCA processing chain

The AMC535 is most effective when considered as the centre of a complete platform combining FMC I/O, FPGA processing, Arm software processing, memory and MicroTCA fabrics.

FMC selection needs to be considered together with FPGA resources, required data rates, clocking, backplane protocol and cooling.

For larger systems, the AMC535 can be incorporated into an ECRIN Systems COTS and Modified COTS solution, combining the FMC mezzanine, chassis, MCH and complementary processing or communication modules.

Production and system integration can then address the complete platform, including FPGA processing, interfaces, mechanics, cooling and system interconnects.

Main configuration options